The Construction of Supervisory Test with the Use of the Genetic Algorithm


The article describes a control test generation method for discrete devices based on the genetic algorithm. The method operability and effectiveness have been checked by means of creating tests for circuits listed in the ISCAS’ 89 catalogue. The C++( Visual Studio 2005) program has been implemented in order to simulate circuit and generate tests. Faults are simulated by programmatically setting an appropriate object in storage to a special state, in which it acts as a faulty component. Test generation has been executed using different values and configurations of the genetic algorithm parameters: selection, population capacity, mutation probability, percent of elite individuals, maximal amount of iterations were changed. The final results and comparison with results of other authors are included into the report.

Key words: 

1. Скобцов Ю.А., Скобцов В.Ю. Логическое моделирование и тестирование цифровых устройств. Донецк: Изд-во Донецк. техн. ун-та, 2005.
2. Барашко А.С., Скобцов Ю.А., Сперанский Д.В. Моделирование и тестирование дискретных устройств. Киев: Наук. думка, 1992.

3. Goldberg D.E. Genetic Algorithms in Search, Optimization, and Machine Learning. Reading: Addison-Wesley, 1989.

4. Blickle T., Thiele L. A Comparison of Selection Schemes used in Genetic Algorithms // TIK - Report. No 11, December. Zurich: ETH, 1995. P.65

Full text: