Izvestiya of Saratov University.

Mathematics. Mechanics. Informatics

ISSN 1816-9791 (Print)
ISSN 2541-9005 (Online)


For citation:

Goldshteyn V. B., Mironov S. V. Hash Functions for Diagnostic Information Reduction. Izvestiya of Saratov University. Mathematics. Mechanics. Informatics, 2007, vol. 7, iss. 2, pp. 76-81. DOI: 10.18500/1816-9791-2007-7-2-76-81

This is an open access article distributed under the terms of Creative Commons Attribution 4.0 International License (CC-BY 4.0).
Published online: 
07.08.2007
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Russian
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UDC: 
681.518

Hash Functions for Diagnostic Information Reduction

Autors: 
Goldshteyn Vitaly Borisovich, Saratov State University
Mironov Sergei Vladimirovich, Saratov State University
Abstract: 

In this paper we present a new approach for the solution of problem of the diagnostic information reduction. This approach is based on use of hash functions delivering a compact signature for records in a fault dictionary. The experimental results show a considerable decrease in the storage requirement of diagnostic information reduced with the help of such functions.

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References: 
  1. Abramovici M., Breuer M.A., Friedman A.D. Digital Systems Testing and Testable Design. N.Y.: Computer Science Press, Inc., 1996.
  2. Ryan P.G., Rawat S., Fuchs W.K. Two-stage fault location // Proc. of International Test Conf. 1991. P. 963–968.
  3. Boppana V., Hartanto I., Fuchs W.K. Full fault dictionary storage based on labeled tree encoding // Proc. of 14th VLSI Test Symposium. 1996. P. 174–179.
  4. Pomeranz I., Reddy S.M. On the generation of small dictionaries for fault location // Proc. of the 1992 IEEE/ACM International Conf. on Computer-Aided design (ICCAD ’92). 1992. P. 272–279.
  5. Ryan P.G., Fuchs W.K., Pomeranz I. Fault dictionary compression and equivalence class computation for sequential circuits // Proc. of IEEE International Conf. on Computer-Aided Design (ICCAD’93). 1993. P. 508–511.
  6. Chess B., Larrabee T. Creating small fault dictionaries // IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 1999. Vol. 18. № 3. P. 346–356.
  7. Arslan B., Orailoglu A. Fault dictionary size reduction through test response superposition // Proc. of the 2002 IEEE International Conf. on Computer Design: VLSI in Computers (ICCD’02). 2002. P. 480–485.
  8. Сперанский Д.В. Об одном подходе к решению задач сокращения объема диагностической информации // Автоматика и телемеханика. 1984. № 3. С. 151–160.
  9. Барашко А.С., Скобцов Ю.А., Сперанский Д.В. Моделирование и тестирование дискретных устройств. Киев: Наук. думка, 1992.
  10. Ахо А., Хопкрофт Дж., Ульман Дж. Структуры данных и алгоритмы. М.: Изд. дом «Вильямс», 2003.
  11. Кармен Т., Лейзерсон Ч., Ривест Р. Алгоритмы, построение и анализ. М.: МЦНМО, 2002.
  12. Niermann T., Patel J. HITEC: a test generation package for sequential circuits // Proc. European Design Automation Conf. 1991. P. 214–218.
  13. Закревский А.Д., Поттосин Ю.В., Черемисинова Л.Д. Основы логического проектирования. Кн. 1. Комбинаторные алгоритмы дискретной математики. Минск: ОИПИ НАН Беларуси, 2004.